发明名称 VOLTAGE STEP-UP CIRCUIT AND VOLTAGE STEP-DOWN CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To switch adequately a voltage step-up level and a voltage step-down level by appropriately selecting combination of the clock pulses supplied to a voltage step-up circuit and a voltage step-down circuit. SOLUTION: A voltage step-up or step-down circuit 10 is formed by cascade- connecting the diodes and capacitors of four stages and four clock pulsesϕ1 toϕ4 are generated and given by a pulse generating circuit 11. This pulse generating circuit 11 generates different combinations of clock pulses in the first and second conditions and gives such combination to the voltage step-up or step-down circuit 10. That is, according to the result of discrimination of a judging circuit 14 of the pulse generating circuit 11, a clock switching circuit 13 selects combination of normal phase and inverse phase based on the clock pulse from the clock oscillation circuit 12 to generate four clock pulsesϕ1 toϕ4. Thereby, even in the same voltage step-up or step-down circuit, the voltage step-up or step-down level can be switched adequately.</p>
申请公布号 JPH10257756(A) 申请公布日期 1998.09.25
申请号 JP19970060298 申请日期 1997.03.14
申请人 FUJITSU LTD 发明人 NAKANO AKIHIRO
分类号 G11C16/06;H02M3/07;(IPC1-7):H02M3/07 主分类号 G11C16/06
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