发明名称 POLYSILICON CMP PROCESS FOR HIGH-DENSITY DRAM CELL
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a DRAM capacitor. SOLUTION: A polysilicon layer is patterned to form a bottom 30 of a capacitor connected to corresponding source/drain regions. A silicon oxide layer 32 is laminated to cover the bottom of the capacitor, photolithography is performed to provide a plurality of openings through the bottom of the capacitor from the layer 32. Polysilicon is deposited to fill each of the openings and chemical mechanical polishing is performed to remove excess polysilicon using the silicon oxide layer as a polish stop. The layer 32 is stripped to leave the capacitor bottom plates with fins or posts extending vertically from the bottom plate. A capacitor dielectric is then formed over the capacitor bottom electrodes, capacitor upper electrodes are formed, and further processing continues in the conventional manner.
申请公布号 JPH10256502(A) 申请公布日期 1998.09.25
申请号 JP19970060243 申请日期 1997.03.14
申请人 UNITED MICROELECTRON CORP 发明人 SON SEII
分类号 H01L27/04;H01L21/02;H01L21/321;H01L21/822;H01L21/8242;H01L27/108 主分类号 H01L27/04
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