| 摘要 |
PROBLEM TO BE SOLVED: To detect a data frame head position by a relatively simple synchronization circuit and to automatically set an intra-package frame phase by using frame pulses FP synchronized with a synchronization pattern for the frame synchronization operation of a logic circuit. SOLUTION: Clock signals CLK inputted through a clock inhibition gate 5 to a frame counter 6 are frequency-divided into N, the frame pulses FP are prepared and they are turned to differential frame pulses in a frame pulse differential circuit 7. They and synchronization position pulses outputted by a synchronization pattern collation circuit 4 are phase-compared in a synchronization position collation gate 8 and phase difference signals are outputted. Also, the phase difference signals and the synchronization position pulses of the synchronization pattern collation circuit 4 are inputted to a clock inhibition number decision gate 9, the operation stoppage signals of the frame counter 6 are outputted until phases are matched corresponding to the signals CLK and the phase of the frame pulses FP is synchronized with the synchronization position pulses. Then, while the operation stoppage signals are inputted, synchronization clock output is stopped. |
