发明名称 CURRENT CONVERSION CIRCUIT AND SIGNAL DELAY CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a current conversion circuit that is available for obtaining a prescribed delay time by supplying 1/2 currents to the current of a 3rd constant current source from the 1st and 2nd constant current sources and outputting a current that is proportional to a square root of the current of the 3rd constant current source. SOLUTION: A current conversion circuit 5 consists of the constant current sources and a conductance amplifier and outputs a current I0 proportional to the square root of a current I1 to supply the current I0 to a delay generation circuit 4a which consists mainly of a capacitor and a MOS element. Meanwhile, a frequency lock loop 10 includes an all-pass filter 2a and a phase comparator 3a which consist of the MOS elements and accordingly outputs the current I1 that is proportional to a square of capacitance C of the capacitor constructing the filter 2a. Then the circuit 4a delays its input signal by a degree equal to a prescribed delay time in response to the current I0 and the capacitance C and then outputs the delayed input signal.</p>
申请公布号 JPH10256847(A) 申请公布日期 1998.09.25
申请号 JP19970060689 申请日期 1997.03.14
申请人 TOSHIBA CORP 发明人 SANO MASARU
分类号 H03F3/45;H03K5/13;(IPC1-7):H03F3/45 主分类号 H03F3/45
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