发明名称 PROCESSOR AND INFORMATION PROCESSOR
摘要 PROBLEM TO BE SOLVED: To actualize a dedicated circuit for a specific purpose of use in an actual use site and to make the implementation of the specific purpose of use speedy by reconstituting a 1st and a 2nd reconfigurable circuit and setting a specific instruction corresponding to the 2nd reconfigurable circuit at the same time. SOLUTION: A user constitutes the RFU 19 so as to attain his or her desired operational function, adds instructions using the RFU 19 to an instruction set, and further reconstitutes a reconfigurable circuit 12a in an instruction decoder 12 so that respective circuits and buses in a processor are controlled by properly decoding the added instruction. An instruction sent to the instruction decoder 12 is converted into a control signal CS1. With the control signal CS1, the respective circuit blocks and buses are controlled. Data regarding cosine conversion are processed through operation between a register file 13 and the RFU 19, but the data of the register file 13 are supplied to the RFU 19 through a bus RFD.
申请公布号 JPH10254696(A) 申请公布日期 1998.09.25
申请号 JP19970059566 申请日期 1997.03.13
申请人 TOSHIBA CORP 发明人 OWAKI YUKITO;SEKINE MASATOSHI;FUJII HIROSHIGE
分类号 G06F7/00;G06F9/30;G06F9/318;G06F9/38;G06F15/78 主分类号 G06F7/00
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