| 摘要 |
PROBLEM TO BE SOLVED: To obtain the comparatively large delay value with high accuracy by turning on and off a switch by means of a clock signal with prescribed pulse width, charging the switch only in its on-time by a constant current to generate the reference voltage, comparing the reference voltage with the voltage charged by an input signal only in the on-time via a comparator, and outputting the signal that is delayed by a time proportional to a time constant. SOLUTION: Relating to a delay circuit part 22, a switch S4 is turned on by an input signal DATAP and the capacity C3 is charged by a constant current source I1. When the C3 exceeds the reference voltage VREF of a reference slice level generation part 21, the output Vout of a comparator CMP is changed to a low level. When the input signals DATAP and DATAN are set at high levels, the switch S4 is turned off and a switch S5 is turned on. Then the electric charge of the capacity C3 is discharged. When the C3 is reduced less than the voltage VREF, the output Vout of the comparator CMP is set at a high level again. Then the delayed signals are repetitively outputted from the CMP. |
