发明名称 DEVICE AND METHOD FOR REPRODUCING DIGITAL SIGNAL USING VARIABLE BUS-WIDTH MEMORY AND DEVICE AND METHOD FOR RECORDING DIGITAL SIGNAL
摘要 Digital data are stored in a memory means in prescribed arranging order and, when a data arrangement to be corrected for an error contained in the arrangement or a data arrangement to be produced is read out, the control of the access to the memory means is made easier, the number of accesses to the memory means is reduced and a data transfer speed is increased to thereby reduce the power consumption when using a semiconductor chip containing the memory means. The memory means which can switch the access bit width between (n) bits and (n x m) bits (n and m: natural numbers), a bus width switching means which can switch the memory access bit width between the (n) and (n x m) bits, and a control means which controls the access are provided. Since the control means controls the access so that the bus width can be switched to the (n x m) bit width at the time of reading out the data arrangement to be reproduced from the memory means, the number of accesses is reduced and the transferring speed of reproduced data is improved. When the memory means which can be changed in access bit width, a means required for the execution of processing, etc., are provided on the same semiconductor chip, the memory means is customized so that the access bit width can be variably set in accordance with each required means.
申请公布号 WO9841987(A1) 申请公布日期 1998.09.24
申请号 WO1997JP00910 申请日期 1997.03.19
申请人 HITACHI, LTD.;HIRAYAMA, HIROSHI;TAKEUCHI, TOSHIFUMI;NAGAI, YUTAKA;KAWAMAE, OSAMU;HOSHIZAWA, TAKU;AKAHOSHI, KENJI 发明人 HIRAYAMA, HIROSHI;TAKEUCHI, TOSHIFUMI;NAGAI, YUTAKA;KAWAMAE, OSAMU;HOSHIZAWA, TAKU;AKAHOSHI, KENJI
分类号 G11B20/10;G11B20/18;G11C7/10;(IPC1-7):G11B20/10;G11C7/00;H03M13/22 主分类号 G11B20/10
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