Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand

摘要

The invention relates to a bus system for DFPs DE 16 88 A1 and to building blocks with two dimensional or multidimensional programmable cell structures (of type FPGA, DPGA or the like), characterized in that a) the bus system comprises a plurality of electrically independent bus segments disconnected by nodes, b) the nodes actively connect or disconnect bus segments, whereby b1) several bus segments are joined and connected by gates to a bus bar located inside the node or b2) connection occurs directly via circuitry elements, drivers and/or registers, c) each node has a routing table where information on the structure of the connection is stored, d) each node has a monitoring unit, which verifies independently if a connection can be established or not.