发明名称 Cache memory system with simultaneous access of cache and main memories
摘要 A processing system includes a cache memory system which receives an address and a memory request from a processor. Simultaneously, information is accessed responsive to the address from a main memory and from a cache memory. During access of the information from the main memory and cache memory, it is determined whether the desired information is stored in the cache memory. If so, the information is output from the cache memory; if not, the information is output from the main memory.
申请公布号 US5813030(A) 申请公布日期 1998.09.22
申请号 US19970850370 申请日期 1997.05.02
申请人 COMPAQ COMPUTER CORP. 发明人 TUBBS, MICHAEL EUGENE
分类号 G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/08
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