发明名称 |
Method for accessing memory by activating a programmable chip select signal |
摘要 |
A data processing system (20) having a high performance chip select (HPCE) signal, which is functionally programmable to remain asserted for a predetermined number of bus cycles based on an access duty cycle. Bits in an option register (52) allow the user to program HPCE for maintained assertion always, never, or for a number of cycles after a last valid address match. Continued assertion reduces access time to an external device allowing the user to determine the trade-off between high speed access and low power consumption. Additionally, a speculative burst access is made without regard to match criteria, allowing a device to prepare for access while data processor (22) determines the next device to access. Here a load burst address (LBA) signal is speculatively provided to an activated device, and where the next access is to another device, the speculative access is aborted.
|
申请公布号 |
US5813041(A) |
申请公布日期 |
1998.09.22 |
申请号 |
US19960660028 |
申请日期 |
1996.06.06 |
申请人 |
MOTOROLA, INC. |
发明人 |
MCINTYRE, JR., KENNETH L.;REIPOLD, ANTHONY M.;PECHONIS, DANIEL W.;LINDQUIST, STEVEN P. |
分类号 |
G06F12/02;G06F12/08;G06F13/16;(IPC1-7):G06F12/00;G11C8/00 |
主分类号 |
G06F12/02 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|