发明名称 Shape simulation method allowing simulation of processed shape during steps of manufacturing a semiconductor device in a short period of time
摘要 An area to which volume ratio "1" as allotted in an analysis area is divided into first and second types of cells. A third cell is placed next to and above the first cell, and volume ratio "0" is allotted to the third cell. With respect to the direction in which the third and first cells are placed next to each other, both cells are adapted to have the same width. As a result, by interpolation of the volume ratio, the position at which volume ratio assumes 0.5 is positioned at the boundary between cells.
申请公布号 US5812435(A) 申请公布日期 1998.09.22
申请号 US19970810169 申请日期 1997.02.28
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 FUJINAGA, MASATO
分类号 G06F17/50;(IPC1-7):G06G7/48 主分类号 G06F17/50
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