发明名称 |
Differential amplifier circuit having low noise input transistors |
摘要 |
A differential amplifier circuit whose noise is reduced when used in a CMOS operational amplifier without increasing its cost includes a differential input stage circuit in which gate lengths of load transistors and gate lengths of differential input transistors are set to an optimal ratio to minimize internal transistor noise components.
|
申请公布号 |
US5812022(A) |
申请公布日期 |
1998.09.22 |
申请号 |
US19960715610 |
申请日期 |
1996.09.18 |
申请人 |
NIPPONDENSO CO., LTD. |
发明人 |
HIRANO, TETSUO;ABE, RYUICHIROU;TANAKA, HIROAKI |
分类号 |
H03F1/26;H03F3/45;(IPC1-7):H03F3/45 |
主分类号 |
H03F1/26 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|