发明名称 Method of making an integrated circuit testing device
摘要 <p>The invention provides for a method of making an integrated circuit tester surface comprising the steps of forming at least one layer of flexible material on a surface of substrate, forming a plurality of conductive vias in each of said layers, depositing a thin film of conductive metal on each of said layers and in said vias, patterning said thin film to form conductive traces, releasing said layer from said substrate, and forming conductive probe points at said vias, and also a method of making an integrated circuit comprising the steps of testing individual logic units of said integrated circuit prior to interconnecting said logic units, and interconnecting said logic units so as to render said integrated circuit operable. <IMAGE></p>
申请公布号 EP0864870(A2) 申请公布日期 1998.09.16
申请号 EP19980201447 申请日期 1989.05.15
申请人 LEEDY, GLENN J. 发明人 LEEDY, GLENN J.
分类号 G01R31/26;G01R1/073;G01R31/28;G01R31/319;G03F7/20;G11C29/00;H01L21/66;(IPC1-7):G01R1/073;G06F11/20 主分类号 G01R31/26
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