发明名称 |
Semiconductor device structure which provides individually controllable body-terminal voltage of MOS transistors |
摘要 |
An N-type well region (NW) is provided on a P-type bulk silicon substrate (PS), and a channel region (PC) is provided inside the N-type well region (NW). The channel region is formed of a semiconductor layer having a polarity opposite to that of a source region (ST) and a drain region (DT). A contact hole (CHC) is provided in a gate oxide film (GO) located below a main portion (MP) close to an end portion (EP) of a gate electrode (GT). With this construction, a semiconductor device in which a body terminal is connected to a gate terminal for fast operation can remove restriction on location for connecting the body terminal and the gate terminal to achieve size-reduction and overcome disadvantages due to restriction on supply voltage.
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申请公布号 |
US5808346(A) |
申请公布日期 |
1998.09.15 |
申请号 |
US19960770422 |
申请日期 |
1996.12.20 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
UEDA, KIMIO |
分类号 |
H01L21/8238;H01L21/84;H01L27/088;H01L27/092;H01L27/12;H01L29/10;H01L29/786;(IPC1-7):H01L29/41 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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