| 摘要 |
A bidirectional buffer circuit is provided with a terminal, an input buffer, a steady state output driver and a strong output driver. The input buffer is for receiving an input signal from the terminal. The steady state output driver includes a weak driver for driving the terminal to a first voltage corresponding to a first particular logic value of the output signal. The weak driver has a limited driving capacity that can be out-driven by the input signal. The strong output driver is for driving the terminal to the first voltage. The strong output driver has a greater driving capacity than the weak output driver. Enable circuitry is also provided. The enable circuitry includes at least one delay circuit with a particular delay period. The enable circuitry enables the strong output driver in response to a transition of the output signal from a complement of the first logic value to the first logic value. However, the enable circuitry only enables the strong driver during the delay period of the delay element.
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