| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory cell that has a planar stack type capacitor structure, can increase the area of a ferroelectric thin film, and can increase the amount of accumulated electric charge. SOLUTION: A semiconductor memory cell comprises a planar first capacitor, a MOS-type transistor element provided at the upper part of the first capacitor via a first interlayer insulation layer 12, and a planar second capacitor provided at the upper part of the MOS-type transistor element via a second interlayer insulation layer 40. In this case, each of first and second capacitors comprises lower electrodes 21 and 51, capacitor insulating films 22 and 52 consisting of a ferroelectric thin film, and upper electrodes 23 and 53 (a), and each of the lower electrodes 21 and 51 is connected to one source/drain region 34A of the MOS-type transistor element via first and second contact plugs 14 and 42 provided at the first and the second interlayer insulation layers 12 and 40 (b). |
