发明名称 SEMICONDUCTOR CHIP PACKAGE
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor chip package in which a high-integration- degree semiconductor chip is mounted by using an LOC structure. SOLUTION: A semiconductor chip 40 is provided with central electrode pads 48 which are arranged in the center of an active face along respective long sides 42 of the semiconductor chip 40 and with peripheral electrode pads 49 which are arranged along respective peripheral parts of its short sides 44. In addition, inner leads at a lead frame are provided with first inner leads 10, of LOC structure, which are attached to the active face 46 and with second inner leads 12, of standard type, which are arranged so as to be separated from the semiconductor chip 40. The first inner leads 10 are connected electrically to the central electrode pads 48 by a wire bonding operation or by metal bumps, and the second inner leads 12 are connected electrically to the peripheral electrode pads 49 by a wire bonding operation. When the bend size of the first internal leads 10 is adjusted, an optimum vertical structure at the inside of a semiconductor chip package 200 can be realized.
申请公布号 JPH10242373(A) 申请公布日期 1998.09.11
申请号 JP19970314876 申请日期 1997.11.17
申请人 SAMSUNG ELECTRON CO LTD 发明人 JEUNG DO-SU;KWON OH-SIK;SO EIKI;NIN BINHIN
分类号 H01L23/50;H01L23/495 主分类号 H01L23/50
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