CLOCK SIGNAL SUPPLYING DEVICE

摘要

PROBLEM TO BE SOLVED: To reduce noise and power consumption by supplying a clock signal to plural function blocks constituting an asynchronous transfer mode(ATM) exchange or the like only when it is required. SOLUTION: Each synchronization detection part 111 extracts a clock signal CK1 and a synchronizing signal SYN1 from cell input data CI1 and outputs input data DI1 having the same format as the data CI1 synchronously with the signal SYN1 . Each clock signal CK1 is applied to a master clock generation part 12 to generate a master clock MC. The input data DI1 and the synchronizing signal SYN1 are applied to a clock signal supply circuit 201 and the validity/ invalidity of data is judged by the leading bit of the input data DI1 . When the validity is judged, the circuit 201 supplies the master clock signal MC to its corresponding function block (S/P conversion part) 13; as a clock signal CLK1 only for a prescribed time.