发明名称 FLAT CELL MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To provide a flat cell memory in which influence of parasitic capacity is eliminated and an on/of current ratio can be increased at the time of data reading. SOLUTION: Two metal bit lines MBL[0], MBL[1] are arranged in a unit memory section 51, cells of the prescribed numbers of cell array 51D are arranged in one unit group, a local bit line in the center of a local bit line coupled to the metal bit lines MBL[0], MBL[1] is coupled to a fixed ground terminal GND1, a cell lastly selected by using an inside and outside cell selecting section 51B and a left and right side cell selecting section 51C, 51E is coupled between the metal bit lines MBL[0], MBL[1] and the fixed ground terminal GND1.</p>
申请公布号 JPH10241390(A) 申请公布日期 1998.09.11
申请号 JP19980045589 申请日期 1998.02.26
申请人 LG SEMICON CO LTD 发明人 SUN-UOOKU JOO
分类号 G11C16/06;G11C16/04;G11C17/12;(IPC1-7):G11C17/12 主分类号 G11C16/06
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