发明名称 CHIP CARRIER AND INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a chip carrier for manufacturing a high-reliability semiconductor integrated circuit device in a simple constitution, without needing a precise aligning operation. SOLUTION: A substrate 21 has a recess 23 on the bottom face 24 of which a semiconductor chip 25 and first end 27 of a leading electrode 26 are disposed with other leading electrode part piercing the side wall 22 and extending along the outer face 28 of the side wall 22. A second end 29 of the electrode 26 extends to the top face 30 of the side wall 22. The chip 22 is connected through a wire 31 to one end 27 of the electrode 26 which exists on the bottom face 24 of the recess 23. A continuously sealing pattern 32 surrounding the recess 23 is formed on a part of the top face 30 of the wall 22 located at the recess 23.
申请公布号 JPH10242188(A) 申请公布日期 1998.09.11
申请号 JP19970038761 申请日期 1997.02.24
申请人 NEC CORP 发明人 KAIGA HIDEAKI
分类号 H01L21/60;H01L23/10 主分类号 H01L21/60
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