发明名称 NON-DUPLICATE CLOCK SIGNAL GENERATING CIRCUIT FOR INTEGRATED CIRCUIT AND ITS METHODS
摘要 PROBLEM TO BE SOLVED: To provide a method and a device to form a non-duplicate time signal. SOLUTION: A reference clock 300 is used, whose frequency is twice the operating frequency of an integrated circuit. The frequency of a main clock signal having a high level pulse width T9b nearly the same as a high level pulse width of the reference clock is a half of the frequency of the reference clock. Similarly a slave clock signal with a high level pulse width T10b nearly equal to the high level pulse width of the reference clock is generated, and the frequency of the slave clock is a half of the frequency of the reference clock. Either or both of the main clock signal and the slave clock signal are extended by the amount T13, T14 smaller than a low level pulse width of the reference clock by means of an analog delay means so that the main clock signal and the slave clock signal are not overlapped. When a transmission time of a circuit component is changed due to the operating temperature or the voltage, the analog delays T13, T14 are changed in proportion to compensate a change in the transmission time of the circuit component.
申请公布号 JPH10242820(A) 申请公布日期 1998.09.11
申请号 JP19970339043 申请日期 1997.12.09
申请人 TEXAS INSTR INC <TI> 发明人 JONES JASON A T;SWOBODA GARY L
分类号 G06F1/06;H03K5/151 主分类号 G06F1/06
代理机构 代理人
主权项
地址