发明名称 PICTURE PROCESSOR
摘要 PROBLEM TO BE SOLVED: To magnify and reduce picture data at arbitrary scale factor with a simple constitution by controlling an FIFO means which fetches the output data of a picture memory means, and outputs the data to a block at the post stage in the order by three controlling means. SOLUTION: A CPU 20 transmits the vertical and horizontal magnification of a picture set by an operator to a memory controlling means 12, writing controlling means 14, and reading controlling means 16, receives the horizontal and vertical synchronizing signals of a video monitor inputted from the outside part, and controls each processing starting timing of the memory controlling means 12, writing controlling means 14, and reading controlling means 16 through a memory control start signal line 34, writing control start signal line 36, and reading control start signal line 38. An FIFO means 18 to which the output of a picture memory means 22 is supplied is controlled by each of the three controlling means 12, 13, and 16 so that it is not necessary to search the address of desired pixel data, and the load of the CPU 20 can be prevented from being increased.
申请公布号 JPH10240923(A) 申请公布日期 1998.09.11
申请号 JP19970062534 申请日期 1997.02.28
申请人 VICTOR CO OF JAPAN LTD 发明人 ITO HIROTOMO
分类号 H04N1/21;G06T1/60;G06T3/40;H04N1/393 主分类号 H04N1/21
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