| 摘要 |
1,100,357. Analogue-digital converters. INTERNATIONAL STANDARD ELECTRIC CORPORATION. 15 July, 1966 [21 July, 1965], No. 31895/66. Heading G4H. In an analogue to digital multiplex coder (Fig. 3), a plurality of independent analogue signals M1 . . . M(m-1) are simultaneously compared in associated comparators S1 . . . S(m-1) with a reference sawtooth or staircase voltage to enable, when the two inputs to one of the comparators are identical, the associated line of a memory MR1 the columns of the memory being enabled by the binary coded outputs of a counter C3 into which clock pulses are fed as the reference voltage increases in amplitude. Consequently the values of all the input analogue signals are stored in binary coded form in the lines of the memory MR1 when the reference voltage reaches its maximum value. Before the reference voltage starts its next cycle the contents of the memory are transferred column by column into a second memory MR2 from which they read out for transmission during the next cycle. Means for synchronizing the cycles of the reference voltage and the read out from the memories are described. |
