| 摘要 |
PROBLEM TO BE SOLVED: To obtain a phase comparator circuit which is not fallen into abnormity. SOLUTION: An output (c) of a D-FF 1 goes to L at the leading edge of a signal (a), a D-FF 2 is set, an output (d) goes to L, the signal (c) to reset the D-FF 1 goes to H to clear setting of the D-FF 2. A signal (d) goes to H at the leading edge of a signal (b) and reset of the D-FF 1 is cleared. In the case that a phase difference of the signals a, b is 180 deg., the circuit is operated so that a duty ratio of an output signal (d) is 50%. A detection section provides an output of H as a signal (h) when the leading edge of signal (b) enters an L area of the signal (c). While the leading edge of the signal (b) matches the signal (c) at an interval, the level of the signal (h) is latched. When the signal (h) goes to H, a control section masks the output (d) of the D-FF 2 to be L. When the output signal (g) goes to L, since a voltage applied to a voltage controlled oscillator is changed largely, the phase synchronization between the signals a, b is unlocked and the synchronization locking is again started. |
