发明名称 LSI chip having programmable buffer circuit
摘要 An LSI chip is mounted on an LSI board. Sub-buffer circuit areas where input buffers, output buffers or input/output buffers are to be formed are provided in signal lines extending from the pad to the internal circuit of the LSI chip. Each sub-buffer circuit area has a plurality of basic elements, such as transistors and resistors, connected in parallel to one another so that different combinations of those elements can be selected by switches. A latch controller is incorporated in the LSI chip, and it has latch circuits serially connected to form a shift register structure. This latch controller sends a program signal for determining the buffer circuit characteristic to the sub-buffer circuit areas. This program signal is generated when program data is input to the latch controller. The program data is given serially via input buffers from the pads on the LSI chip. The latch controller transfers the program data to the latch circuits one after another in synchronism with a clock signal. Those pads connected to the output buffers become signal extending terminals to another circuit.
申请公布号 US5804987(A) 申请公布日期 1998.09.08
申请号 US19960636131 申请日期 1996.04.22
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 OGAWA, KYOHSUKE;TANAKA, YASUNORI
分类号 G06F3/14;H03K19/173;(IPC1-7):H03K19/173;H03K19/08 主分类号 G06F3/14
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