Synchronous semiconductor memory having a burst transfer mode with a plurality of subarrays accessible in parallel via an input buffer

摘要

A synchronous semiconductor memory with a burst transfer mode is comprised of a plurality of memory cell subarrays. A plurality of internal data buses operates with an input buffer circuit to transfer data in parallel to the subarrays. The input buffer includes a shift register composed of a first and second cascade connected registers. A register output selector distributes the data signals in parallel to the plurality of internal buses.