Static type semiconductor memory device with timer circuit

摘要

In a static type semiconductor memory device, a word decoder (13) is connected to a plurality of word lines to decode an address signal to select one of the plurality of word lines. A resistor load type memory cell (10) is connected to said selected word line. The resistor load type memory cell is composed of two pairs of a load resistor and a MOS transistor and the two pairs are connected to form a flip-flop. A word line voltage boosting circuit (12) is connected to the word decoder to boost a voltage of the selected word line to a voltage higher than a power supply voltage in response to a boost control signal. A timer circuit (11) includes a replica of the load transistor of one of the two pair and replicas of the MOS transistors of the two pair. The timer circuit generates the boost control signal for a predetermined time period in response to a start control signal to activate said word line voltage boosting circuit. <IMAGE>