发明名称 CACHE SYSTEM AND OPERATION METHOD FOR CACHE MEMORY
摘要 PROBLEM TO BE SOLVED: To provide a cache system for eliminating or reducing unpredictable processings and to provide caching operations with larger predictability. SOLUTION: This cache system connected between the processor 2 and main memory 6 of a computer is provided with a cache memory 22 provided with a series of cache sections. The respective cache sections are provided with address specifiable plural storage positions for holding items fetched from the main memory 6 for use by the processor 2. The cache system is also provided with a cache exchange engine 30 constituted so as to fetch the item from the main memory 6 and load the item to one cache memory in the address specifiable storage positions of the cache section decided by the address of the item of the main memory 6. It is obtained by a cache section access table for holding multi-bit section display elements for identifying one or more cache sections to load the item relating to the address of the cached item.
申请公布号 JPH10232839(A) 申请公布日期 1998.09.02
申请号 JP19980019729 申请日期 1998.01.30
申请人 SGS THOMSON MICROELECTRON LTD 发明人 STURGES ANDREW CRAIG;MAY DAVID;FARRALL GLENN;FEL BRUNO;BARNABY CATHERINE
分类号 G06F9/46;G06F12/08;G06F12/10;G06F12/12;(IPC1-7):G06F12/12 主分类号 G06F9/46
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