发明名称 Method of designing semiconductor integrated circuit
摘要 <p>A method for designing a semiconductor integrated circuit including: a plurality of combinational circuits, each said combinational circuit having one signal propagation path; and at least one pair of registers which are disposed anterior to and posterior to at least one of the plurality of combinational circuits, the method comprising the steps of: if a signal propagation delay time of the signal propagation path of any of the plurality of combinational circuits is equal to or smaller than a design delay upper limit, defining the combinational circuit as a first combinational circuit using a low-voltage source as a voltage source thereof; and if a signal propagation delay time of the signal propagation path of any of the plurality of combinational circuits exceeds the design delay upper limit, defining the combinational circuit as a second combinational circuit using a high-voltage source as a voltage source thereof. &lt;IMAGE&gt;</p>
申请公布号 EP0862127(A2) 申请公布日期 1998.09.02
申请号 EP19980107361 申请日期 1995.01.18
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 OHARA, KAZUTAKE
分类号 G06F17/50;(IPC1-7):G06F17/50 主分类号 G06F17/50
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