发明名称 Method and system for predicting addresses and prefetching data into a cache memory
摘要 PCT No. PCT/SE92/00282 Sec. 371 Date May 2, 1991 Sec. 102(e) Date May 2, 1991 PCT Filed Apr. 29, 1992 PCT Pub. No. WO92/20027 PCT Pub. Date Nov. 12, 1992A Method for increasing data-processing speed in computer systems containing at least one microprocessor (1), a memory device (3), and a cache (2,4) connected to the processor, in which the cache (2,4) is arranged to fetch data from the addresses in the memory device (3) requested by the processor (1) and then also fetches data from one or several addresses in the memory device (3) not requested by the processor (1). The computer system includes a circuit called the stream-detection circuit (5), connected to interact with a cache (2,4) such that the stream-detection circuit (5) detects the addresses which the processor (1) requests in the cache (2,4) and registers whether the addresses requested already existed in cache (2,4) . The stream-detection circuit (5) is arranged such that it is made to detect one or several sequential series of addresses requested by the processor (1) in the cache (2,4). Additionally, the stream-detection circuit, upon detection of such a series, is structured to command the cache (2,4) to fetch data from the memory device (3) corresponding to the next address in the series and insert the address in the cache (2,4).
申请公布号 US5802566(A) 申请公布日期 1998.09.01
申请号 US19930140097 申请日期 1993.11.16
申请人 SUN MICROSYSTEMS, INC. 发明人 HAGERSTEN, ERIK
分类号 G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/08
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