发明名称 |
Power-on initializing circuit |
摘要 |
A method and apparatus for reducing contention in an integrated circuit during power-up. According to one aspect of the invention, an initialization circuit is included in an integrated circuit. In response to receiving Vcc, the initialization circuit generates a substitute clock signal and a substitute reset signal. The substitute clock signal and substitute reset signal are substituted for an off chip generated clock signal and an off chip generated reset signal during power-up until a predetermined condition is met. In response to receiving the substitute clock signal and the substitute reset signal, a plurality of circuits on said integrated circuit are initialized.
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申请公布号 |
US5801561(A) |
申请公布日期 |
1998.09.01 |
申请号 |
US19970842501 |
申请日期 |
1997.04.21 |
申请人 |
INTEL CORPORATION |
发明人 |
WONG, KENG L.;TAYLOR, GREGORY F.;FERNANDO, ROSHAN J.;SMITH, JEFFREY E. |
分类号 |
H03K17/22;(IPC1-7):H03K17/22 |
主分类号 |
H03K17/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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