发明名称 Method and system for creating and validating low level description of electronic design from higher level, behavior-oriented description, including interactive system for hierarchical display of control and dataflow information
摘要 A technique for hierarchical display of control and dataflow graphs allowing a user to view hierarchically filtered control and dataflow information related to a design. The technique employs information inherent in the design description and information derived from design synthesis to identify "modules" of the design and design hierarchy. The user can specify a level of detail to be displayed for any design element or group of design elements. Any CDFG (control and dataflow graph) object can be "annotated" with a visual attribute or with text to indicate information about the design elements represented by the object. For example, block size, interior color, border color, line thickness, line style, etc., can be used to convey quantitative or qualitative information about a CDFG object. Examples of information which can be used to "annotate" objects include power dissipation, propagation delay, the number of HDL statement represented, circuit area, number of logic gates, etc. The user is able to expand and/or compress CDFG blocks either "in-place" on a higher level CDFG display or to be displayed in isolation. Simulation-related data can also be used to annotate the CDFG. By viewing CDFG's (particularly annotated CDFG's) for a variety of trial designs, a problem-solving user can gain quick insight into the effects and effectiveness of various design choices.
申请公布号 US5801958(A) 申请公布日期 1998.09.01
申请号 US19960707918 申请日期 1996.09.10
申请人 LSI LOGIC CORPORATION 发明人 DANGELO, CARLOS;WATKINS, DANIEL;MINTZ, DORON
分类号 G01R31/317;G01R31/3183;G06F11/26;G06F17/50;(IPC1-7):G06F17/50 主分类号 G01R31/317
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