发明名称 Method and apparatus for dynamic buffer allocation in a bus bridge for pipelined reads
摘要 A bus bridge circuit employs a dynamic allocation scheme that allows read transactions to be pipelined without deadlock and without the need for permanently reserving multiple buffer slots for read response transactions. The bus bridge circuit associates input and output buffers with a node and includes a state machine to monitor the number and type of transaction packets currently in slots that make up the buffers. In particular, the state machine monitors the number of transaction packets loaded in the output buffer slots, the number of outstanding read transactions for the node, and the number of read response transactions currently loaded in the output buffer. The state machine then allows the node to load a READ or WRITE transaction only if the monitored data indicates at least one of the buffer slots will be available to service a READ RESPONSE subsequently loaded by the node. The state machine launches READs to the node only when an unallocated buffer slot is available to service the corresponding READ RESPONSE.
申请公布号 US5802055(A) 申请公布日期 1998.09.01
申请号 US19960635646 申请日期 1996.04.22
申请人 APPLE COMPUTER, INC. 发明人 KREIN, WILLIAM TODD;FLAIG, CHARLES M.;KELLY, JAMES D.
分类号 G06F13/40;(IPC1-7):G06F13/00 主分类号 G06F13/40
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