发明名称 Eliminating poisoned via problem
摘要 A method of manufacturing interconnect in semiconductor device comprises of the steps: (1) on one semiconductor substrate, adjacent to one first insulator supplying one conductive layer, in which the conductive layer has top surface sharing common plane with first insulator; (2) on conductive layer and top surface of first insulator depositing one etch stop layer, which is different from first insulator; (3) on etch stop layer depositing one second insulator, which is different from etch stop layer; (4) etching one via to expose part of etch stop layer, and etched via at least locally formed on conductive layer; (5) removing etch stop layer in via; (6) in via filling one conductive material.
申请公布号 FR2760129(A1) 申请公布日期 1998.08.28
申请号 FR19970005290 申请日期 1997.04.29
申请人 UNITED MICROELECTRONICS CORPORATION 发明人 SUN SHIH WEI
分类号 H01L23/522;H01L21/768;(IPC1-7):H01L21/28 主分类号 H01L23/522
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