Trench isolated FET devices, and method for their manufacture

摘要

A method for improving the subthreshold leakage characteristics of a trench-isolated FET device is described. This method involves first forming a vertical slot within a stack structure disposed on an oxide-covered silicon substrate, and then forming spacers on the sidewalls of the slot. A trench is then etched in the substrate. Removal of the spacers uncovers a horizontal ledge on the exposed surfaces of the oxide-covered substrate, adjacent the trench. The ledge is then perpendicularly implanted with a suitable dopant, thereby suppressing edge conduction in the device. Articles prepared by this method are also described.