Phase-independent clock circuit and method

摘要

A circuit and method are provided for generating a programmable clock signal VRCLK at a frequency of a reference signal VREF such that the phase of VRCLK in relation to the phase of VREF is variable. VREF and VRCLK are each coupled to a frequency comparing circuit which computes their respective frequencies. The frequency comparing circuit subtracts the respective frequencies of VREF and VRCLK to produce a frequency adjusting signal VFREQ which corresponds to the difference in the frequencies of VREF and VRCLK. VFREQ is used to adjust the frequency of VRCLK.