发明名称 Method for direct access test of embedded cells and customization logic
摘要 Methods and related structures for both operating and testing an integrated circuit constructed of combinations of customization logic and embedded cells. Functional modes include an operational mode and a test mode with two submodes. Test terminals of embedded cells, as well as test points in customization logic, are both accessed via a multiplexing scheme using test points of x-y (row and column) wiring traces of a grid-based "cross-check" test structure for both logic testing and embedded cell testing. Common conductors or traces can be used to operate the embedded cells and to control the made and test the embedded cells and customization logic. The x and y lines can be operated as signal lines, as probe lines, as sense lines and as control lines, as needed, using multiplexing according to the invention. In addition, the x and y lines can be used, in connection with analog multiplexers and switches, to probe, stimulate and sense embedded analog signal circuits, subsystems and conditions of an embedded cell. In a case where multiple probe lines are active, test points are held in a high impedance state by placing the clock of latches or flip flops at the intersections of the sense lines and the probe lines in a suspended state and applying only half the switching voltage to the line operative as the sense line. Such latches also permit testing in the presence of asynchronous signals.
申请公布号 US5799021(A) 申请公布日期 1998.08.25
申请号 US19970822383 申请日期 1997.03.20
申请人 DUET TECHNOLOGIES, INC. 发明人 GHEEWALA, TUSHAR R.
分类号 G01R31/3185;G11C29/12;G11C29/48;(IPC1-7):G01R31/28 主分类号 G01R31/3185
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