发明名称 ELECTRONIC DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To easily set a low-power mode by providing a processor which enters the low-power mode on receiving a receive information signal in response to a set-ON sleep signal and a memory which can be set into the low-power mode, and placing the memory in the low-power mode in response to the detection of the receive information signal. SOLUTION: The receive information signal is used to control the setting of the memory 13 into the low-power mode. When the receive information signal is a transaction sent by the processor 10 through a bus 11, a means 14 which detects the receive information signal and places the memory 13 in the low-power mode can be built in a sleep control means 15 that a memory controller 12 is equipped with. Consequently, no new electric circuit needs to be provided and the receive information transaction on the bus 11 is recognized; and the memory controller 12 is only programmed so that a sleep command is sent to the memory 13 in response to the transaction.</p>
申请公布号 JPH10228340(A) 申请公布日期 1998.08.25
申请号 JP19980005295 申请日期 1998.01.14
申请人 HEWLETT PACKARD CO <HP> 发明人 THOULON PIERRE-YVES
分类号 G06F1/26;G06F1/32;G11C11/403;G11C11/406;G11C11/41;(IPC1-7):G06F1/32 主分类号 G06F1/26
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