发明名称 MULTI-LAYER PRINTED CIRCUIT BOARD PATTERN DESIGN PROCESSOR
摘要 PROBLEM TO BE SOLVED: To plot via on a display screen so that layers that are connected by via may intuitively and easily be decided in a printed circuit board pattern design processor. SOLUTION: A processing part 2 reads position data of via on a layer, layers connecting data and prescribed shape data from a storing part 3. The prescribed shape is divided into layer sections D1 to D6 which correspond to each layer and shown at a position of a display part 4 which corresponds to the position data, and also, via section V that corresponds to layers which are connected by via based on the layers connecting data, synthesized and shown. Furthermore, plural sections V that exist at the same display position are combined and shown.
申请公布号 JPH10222546(A) 申请公布日期 1998.08.21
申请号 JP19970019424 申请日期 1997.01.31
申请人 FUJITSU LTD 发明人 KONNO EIICHI;KUMADA TORU
分类号 H05K3/46;G06F17/50;(IPC1-7):G06F17/50 主分类号 H05K3/46
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