| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing process which is capable of manufacturing a high-voltage transistor, a logic transistor, and a memory cell, meeting requirements for a device of geometrical shape below 0.3μm dimensions, wherein the gate oxide of the logic transistor is smaller in thickness than the tunnel oxide of a non-volatile memory, and the gate oxide of the logic transistor and the tunnel oxide of the memory cell are kept free from unnecessary contamination. SOLUTION: A tunnel oxide 50G of a memory cell is grown as thick as prescribed. In a following process, a cloped polycrystalline silicon layer 60C which functions as the floatirng gate of the memory cell is deposited direct on the tunnel oxide 50C of the memory cell. By this setup, the tunnel oxide is protected from contamination in a following masking and etching step. The gate oxide 52B of a logic transistor and the gate oxide 90A of a high-voltage transistor are grown as thick as prescribed. |
