发明名称 SELECTING METHOD FOR SEMICONDUCTOR MEMORY CELL AND SEMICONDUCTOR MEMORY CELL SELECTOR CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To prevent semiconductor memory cells more than two from being simultaneously selected. SOLUTION: When the signal of logic value High is outputted from the 1st input/output terminal of CPU 1 and the signal of logic value Low is outputted from the 2nd input/output terminal respectively, only a 1st EEPROM 2 outputs data corresponding to the output signal of selector circuit 5 and when the signal of logic value Low is outputted from the 1st input/output terminal and the signal of logic value High is outputted from the 2nd input/output terminal respectively, inversely, only a 2nd EEPROM 3 outputs data but when the signal of logic value High or Low is outputted from both the 1st and 2nd input/ output terminals, on the other hand, both the EEPROM 2 and 3 are turned to inactive state by the selection circuit 5.</p>
申请公布号 JPH10222429(A) 申请公布日期 1998.08.21
申请号 JP19970032583 申请日期 1997.02.03
申请人 ZEXEL CORP 发明人 ONISHI AKIHIRO;MIYANAGA CHOSHICHI
分类号 G06F12/16;G11C8/12;G11C16/02;(IPC1-7):G06F12/16 主分类号 G06F12/16
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