发明名称 |
TWO-WAY EXAMINING FRAME SYNCHRONIZATION CIRCUIT |
摘要 |
A frame synchronizing circuit which does not cause out-of-synchronism resulting from data disappearance/insertion while suppressing the missynchronization/asynchronization caused by representative code errors of the conventional data transmission system. The frame synchronizing circuit is provided with a frame synchronizing code detecting circuit (32) which detects a frame synchronizing code from a received data sequence, and outputs a frame position and collation results by collating the detected frame synchronizing code with a correct frame synchronizing code, and a data disappearance and data-insertion section judging circuit (54) which judges whether or not data disappearance or data is inserted in the received data sequence based on the collation results.
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申请公布号 |
CA2251822(A1) |
申请公布日期 |
1998.08.20 |
申请号 |
CA19982251822 |
申请日期 |
1998.02.12 |
申请人 |
NTT MOBILE COMMUNICATIONS NETWORK INC. |
发明人 |
MIKI, TOSHIO;HOTANI, SANAE |
分类号 |
H04J3/06;H04L7/08;(IPC1-7):H04L7/04;H04L1/20 |
主分类号 |
H04J3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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