发明名称 Multi-media computer architecture
摘要 A computer system is comprised of at least one of a main bus and an attached expansion bus, a CPU connected to the main bus, peripherals connected to one of the main bus or to the expansion buses, a subsystem connected to a bus for receiving control, address and data signals from the CPU comprising a graphics controller, a data compression circuit, a video controller, a memory connected to data input ports of the circuits and controllers via a subsystem bus having a bandwidth sufficient to carry video and graphics display signals, a first arbiter for determining which controller is permitted access the memory, a link bus connecting each of the controllers, and apparatus for providing polling signals to each of the controllers and circuits on the link bus and for receiving acknowledgement signals therefrom, and thereby synchronizing and allowing exchange of control information between the controllers and circuits.
申请公布号 US5796960(A) 申请公布日期 1998.08.18
申请号 US19950452318 申请日期 1995.05.26
申请人 ATI TECHNOLOGIES, INC. 发明人 BICEVSKIS, ROBERT P.;HARTOG, ADRIAN H.;CARUK, GORDON;ALFORD, MICHAEL A.
分类号 G06F13/00;(IPC1-7):G06F13/00 主分类号 G06F13/00
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