SENSE AMPLIFYING METHODS AND SENSE AMPLIFICATION AND OUTPUT BUFFER INTEGRATED CIRCUITS

摘要

Disclosed is a sense amplifier (200) and output buffer circuitry (208) for amplifying and outputting data signals that are read from memory devices. The sense amplifier (200) includes a sense amplifying core (201) having an amplifier circuit (205) and an output data latching circuit (203). The amplifier circuit (205) is configured to voltage amplify the data signal, and the output data latching circuit (203) is configured to latch the amplified data signal. The sense amplifier (200) further includes a dummy sense amplifying core (201') for generating a read enable signal to be communicated to the output data latching circuit (203) of the sense amplifying core (201). The read enable signal preferably operates to switch-on the output data latching circuit (203). And, the amplifier circuit (205) is configured to switch itself off via an internal feedback signal.