| 摘要 |
A network adapter for allowing packet data to be separated over multiple bus targets without impact to input/output bus bandwidth or network performance, having: a bus interface circuit; a bus protocol circuit coupled to the bus interface circuit; a burst dispatcher circuit coupled to the bus protocol circuit; a network interface coupled to a read processing circuit and a write processing circuit, wherein the read processing circuit and the write processing circuit are coupled to the burst dispatcher; and, a synchronization and buffering circuit coupled to the bus protocol circuit, the burst dispatcher circuit, the read processing circuit and the write processing circuit.
|
