发明名称 CLAMP CIRCUIT
摘要 PROBLEM TO BE SOLVED: To realize a clamp circuit whose most components are built in a semiconductor device. SOLUTION: A clamp circuit is configured with a load resistor 17, a bias adjustment P-channel MOS transistor(TR) 18, a bias generating N-channel MOS TR 19 and a bias generating resistor 20 which are built in a semiconductor device and integrated on a silicon substrate and a DC signal component cut-off capacitor 16 being an externally mounted component of the semiconductor device. A DC signal component of an input signal inputted to an input signal terminal 11 is eliminated through the capacitor 16 to input the signal to the inside of the semiconductor, where a bias is adjusted with the MOS TR 18 and the signal is clamped at the same voltage as the DC reference voltage applied to a reference voltage terminal 14. The clamped signal is transferred to an internal circuit through an output signal terminal 15. Since only the capacitor 16 is an externally mounted component, miniaturization and low cost are attained.
申请公布号 JPH10215389(A) 申请公布日期 1998.08.11
申请号 JP19970014929 申请日期 1997.01.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 KUBO HIRONORI;SONOBE HIROYUKI;TANIGAWA SATORU
分类号 H04N5/16;H03K5/007;H03K19/0175 主分类号 H04N5/16
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