发明名称 Apparatus for protecting gate electrodes of target transistors in a gate array from gate charging by employing free transistors in the gate array
摘要 In a gate array having a plurality of free transistors and target transistors, a method and apparatus for protecting a gate electrode of a target transistor from gate charge by employing a free transistor as a gate electrode protection device. A target transistor is a transistor that has been determined to need gate charging protection. A free transistor is a transistor in the gate array which is not used to implement the logic design as embodied in the gate array. Initially, a base array is formed without any metal layers. Then, a determination is made as to which transistors require gate charging protection. The gate electrode of each target transistor determined to require gate charging is coupled to an associated drain or source electrode of a free transistor of the gate array. The gate electrode of the free transistor is connected to an appropriate voltage reference to turn the free transistor off.
申请公布号 US5793069(A) 申请公布日期 1998.08.11
申请号 US19960672411 申请日期 1996.06.28
申请人 INTEL CORPORATION 发明人 SCHUELEIN, MARK EDWARD;BUTLER, EDWARD
分类号 H01L27/02;H01L27/118;(IPC1-7):H01L27/10;H01L23/62 主分类号 H01L27/02
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