发明名称 METHOD FOR SYNCHRONIZING DATA BIT, AND DATA TRANSFER SYSTEM
摘要 <p>PROBLEM TO BE SOLVED: To provide a method and device by which a data clock control signal inserted into the parity bit position of a data bus is transmitted, and data bytes accompanied with it is latched by a receiving device in a data transmission system equipped with a parity function. SOLUTION: A transmitting device 20 connected through data buses 30 and 32 with a receiving device 40 generates data clock signals, latches the clock signals at the parity bit positions of the data buses 30 and 32, and then transmits the clock signals and data bytes through the data buses 30 and 32 to the receiving device 40. The receiving device 40 latches the data bytes from the data buses 30 and 32 by using the clock signals. Therefore, in this data transmission system 10, the receiving device 40 operates property inspection and synchronization of an accompanied data type by using the data clock signals transmitted while inserted at the parity bit positions of the data buses 30 and 32.</p>
申请公布号 JPH10214238(A) 申请公布日期 1998.08.11
申请号 JP19980000063 申请日期 1998.01.05
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 GREG STEPHEN LUKAS;HOAN ANTONIO JANES
分类号 G06F13/42;G06F13/00;H03M13/09;H04L1/00;H04L7/00;(IPC1-7):G06F13/00 主分类号 G06F13/42
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