发明名称 |
Integrated circuit memory with back end mode disable |
摘要 |
A memory circuit is described which can operate in one of a number of operating modes. The operating mode of the memory circuit can be changed in a non-volatile manner after the memory circuit is packaged to reduce production scrap or meet market demands. Disable circuitry is described which includes an anti-fuse that can be externally selectively blown to disable an operating mode. Control circuitry included in the memory circuit enables a new operating mode after the first operating mode is disable. A method of selectively disabling an operating mode is described. A hierarchical scheme is also described for enabling a new operating mode from a group of operating modes, for example page-mode, extended data output (EDO), or burst EDO.
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申请公布号 |
US5793692(A) |
申请公布日期 |
1998.08.11 |
申请号 |
US19970826276 |
申请日期 |
1997.03.27 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
MERRITT, TODD;MANNING, TROY |
分类号 |
G11C11/401;G11C7/10;(IPC1-7):G11C7/00 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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