| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit device for eliminating a clock skew by suppressing dispersion of a wiring delay generated by irregularity of shape o clock wirings at a step of manufacturing. SOLUTION: Floating wirings 13 for flowing no current from an exterior is disposed in parallel at an interval of 0.3μm independently of a circuit operation at both sides of clock wiring 11 without presence of a signal line adjacent to a range of less than 5μm at both sides, wiring capacity is positively added to cancel wiring resistance generated by the dispersion of the wiring shape to that of the wiring capacity.
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